A 27 GHz, 14 dBm CMOS power amplifier using 0.18 μm common-source MOSFETs

Jong Wook Lee; Sang Moo Heo

doi:10.1109/LMWC.2008.2005236

A 27 GHz, 14 dBm CMOS power amplifier using 0.18 μm common-source MOSFETs

Jong Wook Lee
, Sang Moo Heo

Research output: Contribution to journal › Article › peer-review

31 Citations (Scopus)

Abstract

A Ka-band three-stage CMOS power amplifier was designed and fabricated using 0.18 μm gate-length common-source transistors. For low loss and accurate matching networks for the amplifier, a substrate-shielded microstrip-line was used with good modeling accuracy up to 40 GHz. The measured insertion loss was 0.5 dB/mm at 25 GHz. The three-stage amplifier achieved a 14.5 dB small-signal gain, 14 dBm output power, and 13.2% power-added-efficiency at 27 GHz in a compact chip area of 0.84 mm². The measured gain was the highest for Ka-band power amplifiers using common-source transistors. These results were achieved at a voltage compatible with deep sub-micrometer CMOS technology.

Original language	English
Article number	4666751
Pages (from-to)	755-757
Number of pages	3
Journal	IEEE Microwave and Wireless Components Letters
Volume	18
Issue number	11
DOIs	https://doi.org/10.1109/LMWC.2008.2005236
Publication status	Published - Nov 2008

Bibliographical note

Funding Information:
Manuscript received May 05, 2008; revised July 01, 2008. Current version published November 05, 2008. This work was supported by ETRI SoC Industry Promotion Center, Human Resource Development Project for IT SoC Architects. The authors are with the School of Electronics and Information, Kyung Hee University, Suwon 446-701, Korea (e-mail: [email protected]). Color versions of one or more of the figures in this letter are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/LMWC.2008.2005236

Keywords

CMOS
Ka-band
Power amplifier

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10.1109/LMWC.2008.2005236

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abstract = "A Ka-band three-stage CMOS power amplifier was designed and fabricated using 0.18 μm gate-length common-source transistors. For low loss and accurate matching networks for the amplifier, a substrate-shielded microstrip-line was used with good modeling accuracy up to 40 GHz. The measured insertion loss was 0.5 dB/mm at 25 GHz. The three-stage amplifier achieved a 14.5 dB small-signal gain, 14 dBm output power, and 13.2\% power-added-efficiency at 27 GHz in a compact chip area of 0.84 mm2. The measured gain was the highest for Ka-band power amplifiers using common-source transistors. These results were achieved at a voltage compatible with deep sub-micrometer CMOS technology.",

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AB - A Ka-band three-stage CMOS power amplifier was designed and fabricated using 0.18 μm gate-length common-source transistors. For low loss and accurate matching networks for the amplifier, a substrate-shielded microstrip-line was used with good modeling accuracy up to 40 GHz. The measured insertion loss was 0.5 dB/mm at 25 GHz. The three-stage amplifier achieved a 14.5 dB small-signal gain, 14 dBm output power, and 13.2% power-added-efficiency at 27 GHz in a compact chip area of 0.84 mm2. The measured gain was the highest for Ka-band power amplifiers using common-source transistors. These results were achieved at a voltage compatible with deep sub-micrometer CMOS technology.

KW - CMOS

KW - Ka-band

KW - Power amplifier

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JF - IEEE Microwave and Wireless Components Letters

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M1 - 4666751

ER -

A 27 GHz, 14 dBm CMOS power amplifier using 0.18 μm common-source MOSFETs

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Keywords

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