A 639.38GOPS Hybrid-Domain Logic-Compatible Multi-Level Embedded Flash Computing-in-Memory Macro with Spike-Edge Computation

Computing in Memory (CIM) has emerged as a promising research field, significantly reducing power consumption and latency associated with massive data movement and multiply-and-accumulate (MAC) operations in edge Al devices. For battery-constrained edge devices, non-volatile memories (NVMs) are ideal due to their ability to retain neural network parameters even when powered down, ensuring rapid response time upon device wake-up. Recent studies [2, 3] have integrated NVM into CIM architectures using STT-MRAM and RRAM, achieving high throughput and energy efficiency. Nevertheless, NVMs necessitate specialized fabrication technologies and additional manufacturing steps, which increase process complexity and costs (Fig. 1 (top-left)). As NVM processes advance, these technologies become increasingly challenging to access due to the escalating costs.