A Priority-based 6T/8T hybrid SRAM architecture for aggressive voltage scaling in video applications

Ik Joon Chang, Debabrata Mohapatra, Kaushik Roy

Research output: Contribution to journalArticlepeer-review

112 Citations (Scopus)

Abstract

We present a voltage-scalable and process-variation resilient, hybrid memory architecture, suitable for use in MPEG-4 video processors such that power dissipation can be traded for graceful degradation in quality. The key innovation in our proposed work is a hybrid memory array, which is a mixture of conventional 6T and 8T SRAM bit-cells. The fundamental premise of our approach lies in the fact that the human visual system is mostly sensitive to higher order bits of luminance pixels in video data. We implemented a preferential storage policy in which the higher order luma bits are stored in robust 8T bit-cells while the lower order bits are stored in conventional 6T bit-cells. This facilitates aggressive scaling of supply voltage in memory as the important luma bits, stored in 8T bit-cells, remain relatively unaffected by voltage scaling. The not-so-important lower order luma bits, stored in 6T bit-cells, if affected, contribute insignificantly to the overall degradation in output video quality. Simulation results show that under iso-area condition, we can obtain at least 32% power savings in the hybrid memory array compared to the conventional 6T SRAM array.

Original languageEnglish
Article number5686921
Pages (from-to)101-112
Number of pages12
JournalIEEE Transactions on Circuits and Systems for Video Technology
Volume21
Issue number2
DOIs
Publication statusPublished - Feb 2011

Bibliographical note

Funding Information:
Manuscript received July 8, 2009; revised November 16, 2009 and May 19, 2010; accepted July 6, 2010. Date of publication January 13, 2011; date of current version March 2, 2011. This work was supported by Semiconductor Research Corporation and the Focused Center Research Program—Gigascale Systems Research Center. This paper was presented in part at the Design Automation Conference, 2009. This paper was recommended by Associate Editor S.-Y. Chien.

Keywords

  • Aggressive voltage scaling in SRAM
  • hybrid SRAM array
  • low power SRAM design
  • process variation resilient SRAM
  • video memory

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