An offset cancellation bit-line sensing scheme for low-voltage DRAM applications

Sang Hoon Hong; Si Hong Kim; Se Jun Kim; Jae Kyung Wee; Jin Yong Chung

An offset cancellation bit-line sensing scheme for low-voltage DRAM applications

Sang Hoon Hong
, Si Hong Kim
, Se Jun Kim
, Jae Kyung Wee
, Jin Yong Chung

Research output: Contribution to journal › Conference article › peer-review

4 Citations (Scopus)

Abstract

Offset-cancellation provides low-voltage DRAM operation. The offset cancelling bit-line sense amplifers are pitch-matched to the conventional 0.16 μm DRAM cell array without process modifications. Results indicate better refresh characteristics than conventional bit-line sense amplifiers even at 1.5 V.

Original language	English
Pages (from-to)	116-117+427
Journal	Digest of Technical Papers - IEEE International Solid-State Circuits Conference
Issue number	SUPPL.
Publication status	Published - 2002
Event	2002 IEEE International Solid-State Circuits Conference - San Francisco, CA, United States Duration: 3 Feb 2002 → 7 Feb 2002

Cite this

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title = "An offset cancellation bit-line sensing scheme for low-voltage DRAM applications",

abstract = "Offset-cancellation provides low-voltage DRAM operation. The offset cancelling bit-line sense amplifers are pitch-matched to the conventional 0.16 μm DRAM cell array without process modifications. Results indicate better refresh characteristics than conventional bit-line sense amplifiers even at 1.5 V.",

author = "Hong, \{Sang Hoon\} and Kim, \{Si Hong\} and Kim, \{Se Jun\} and Wee, \{Jae Kyung\} and Chung, \{Jin Yong\}",

year = "2002",

language = "English",

pages = "116--117+427",

journal = "Digest of Technical Papers - IEEE International Solid-State Circuits Conference",

issn = "0193-6530",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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TY - JOUR

T1 - An offset cancellation bit-line sensing scheme for low-voltage DRAM applications

AU - Hong, Sang Hoon

AU - Kim, Si Hong

AU - Kim, Se Jun

AU - Wee, Jae Kyung

AU - Chung, Jin Yong

PY - 2002

Y1 - 2002

N2 - Offset-cancellation provides low-voltage DRAM operation. The offset cancelling bit-line sense amplifers are pitch-matched to the conventional 0.16 μm DRAM cell array without process modifications. Results indicate better refresh characteristics than conventional bit-line sense amplifiers even at 1.5 V.

AB - Offset-cancellation provides low-voltage DRAM operation. The offset cancelling bit-line sense amplifers are pitch-matched to the conventional 0.16 μm DRAM cell array without process modifications. Results indicate better refresh characteristics than conventional bit-line sense amplifiers even at 1.5 V.

UR - https://www.scopus.com/pages/publications/0036230276

M3 - Conference article

AN - SCOPUS:0036230276

SN - 0193-6530

SP - 116-117+427

JO - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

JF - Digest of Technical Papers - IEEE International Solid-State Circuits Conference

IS - SUPPL.

T2 - 2002 IEEE International Solid-State Circuits Conference

Y2 - 3 February 2002 through 7 February 2002

ER -

An offset cancellation bit-line sensing scheme for low-voltage DRAM applications

Abstract

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