Automated iterative pipelining for ASIC design

Computer Science

• Application Specific Integrated Circuit 100%
• Clock Frequency 20%
• Computational Complexity 20%
• Computer Architecture 20%
• Datapath 20%
• Design Exploration 40%
• Design Tool 20%
• FIR Filter 20%
• Function Evaluation 20%
• Matrix Multiplication 20%
• Pipeline Pattern 20%
• Pipelining 100%
• Timing Information 20%
• Timing Requirement 20%
• Wavelet Transforms 20%