Crystallographic orientation engineering of In₂O₃ channel via thickness modulation for high-mobility top-gate thin-film transistors

To enhance the performance of top-gate In₂O₃ thin-film transistors (TFTs), the Al₂O₃ gate-stack deposition process, which was performed by means of atomic-layer deposition (ALD), was exploited for the crystallization of the channel layer, accompanied by investigations into the physical origins of the variations in device characteristics. The technical strategy employed to induce the film crystallinity even at a temperature as low as 200 °C was found to be associated with the deposition mechanism of the sputtered In₂O₃, where a 1.0 nm difference in channel thickness (T_CH) resulted in a critical discrepancy in the transition behaviors of crystal orientation. The film crystallinity achieved at a T_CH of 6.0 nm improved with increasing T_CH, resulting in the formation of a preferred orientation of highly ordered (222) planes at a T_CH of 7.5 nm, subsequently, leading to polycrystalline structures at T_CHs exceeding 8.0 nm. This approach was successful in achieving a field-effect mobility (µ_FE) of 73.1 cm²/Vs by controlling the carrier concentrations above 10¹⁹ /cm³ through the formation of effective conduction pathways within preferentially oriented crystalline In₂O₃ channels. However, electron trapping at grain boundaries was found to reduce µ_FE in polycrystalline structures at T_CHs above 8.0 nm. Notwithstanding a reduction in the channel length of the device to 4 µm, the techniques for crystallizing the In₂O₃ channel were well verified, resulting in a µ_FE of 82.2 cm²/Vs. The contact resistance of the crystalline In₂O₃ channel with the In-Sn-O (ITO) electrode was estimated to be approximately 0.30 Ω·cm, independent of the T_CH, suggesting good compatibility with the ITO electrodes. These findings can offer an innovative process technique for enhancing the device performance of top-gate In₂O₃ TFTs by means of the facile crystallization of the channel layer.