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Device Characterization of Nanoscale Vertical-Channel Transistors Implemented with a Mesa-Shaped SiO2 Spacer and an In-Ga-Zn-O Active Channel

  • Hyun Joo Ryoo
  • , Hyun Min Ahn
  • , Nak Jin Seong
  • , Kyu Jeong Choi
  • , Chi Sun Hwang
  • , Sung Jin Chang
  • , Sung Min Yoon

Research output: Contribution to journalArticlepeer-review

25 Citations (Scopus)

Abstract

A nanoscale vertical-channel thin film transistor (V-TFT) with a channel length shorter than 160 nm was fabricated and characterized, in which In-Ga-Zn-O (IGZO) and SiO2 thin films were prepared by atomic layer deposition and plasma-enhanced chemical-vapor deposition as active and spacer layers, respectively. The prototype device showed sound transistor operation with an on/off ratio of 8.8 × 103 and robust stabilities without any shift in transfer curves under positive/negative bias stresses at 1 MV/cm for 104 s. It was also noteworthy that there was no anomalous increase in off-state current during the positive bias stress test, which is suggested to originate from a high-quality interface between the SiO2 spacer and IGZO active layers on the back-channel region. Alternatively, high off-state current levels were found to result from the formation of conduction paths generated by carbon-related residues on the vertical back-channel region through the surface time-of-flight secondary ion mass spectrometer analysis. Improvements in device performance and analysis of operation failures will provide insight into the implementation of nanoscale oxide V-TFTs.

Original languageEnglish
Pages (from-to)4189-4196
Number of pages8
JournalACS Applied Electronic Materials
Volume3
Issue number9
DOIs
Publication statusPublished - 28 Sept 2021

Bibliographical note

Publisher Copyright:
© 2021 American Chemical Society.

Keywords

  • In−Ga−Zn−O
  • oxide semiconductor
  • spacer
  • thin film transistor
  • vertical channel

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