Effect of Grain Boundary Protrusion on Electrical Performance of Low Temperature Polycrystalline Silicon Thin Film Transistors

Mohammad Masum Billah; Abu Bakar Siddik; Jung Bae Kim; Lai Zhao; Soo Young Choi; Dong Kil Yim; Jin Jang

doi:10.1109/JEDS.2019.2911088

Effect of Grain Boundary Protrusion on Electrical Performance of Low Temperature Polycrystalline Silicon Thin Film Transistors

Mohammad Masum Billah, Abu Bakar Siddik, Jung Bae Kim, Lai Zhao, Soo Young Choi, Dong Kil Yim, Jin Jang

Research output: Contribution to journal › Article › peer-review

30 Citations (Scopus)

Abstract

We studied the impact of grain boundary (GB) protrusion on the electrical properties of low temperature polycrystalline silicon thin film transistors. The analysis of atomic force microscopy and transmission electron microscopy images indicate the grain size of 350 nm and a protrusion height of 35 nm. The transfer and output characteristics are well fitted by technology computer-aided design using two different density of states for poly-Si grain and GB, respectively. From 2-D contour mapping, a drastic reduction of hole concentration ( sim 5times 10^16,mathrmcm^-3 ) at GB protrusion site was obtained as compared to the grain ( sim 3times 10^18,mathrmcm^-3 ). Trapping concentration at GB is much higher, which leads to the reduction in the mobility.

Original language	English
Article number	8695046
Pages (from-to)	503-511
Number of pages	9
Journal	IEEE Journal of the Electron Devices Society
Volume	7
DOIs	https://doi.org/10.1109/JEDS.2019.2911088
Publication status	Published - 2019

Bibliographical note

Publisher Copyright:
© 2013 IEEE.

Keywords

Low temperature polycrystalline silicon (LTPS)
technology computer-aided design (TCAD)
thin-film transistors (TFTs)

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10.1109/JEDS.2019.2911088

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title = "Effect of Grain Boundary Protrusion on Electrical Performance of Low Temperature Polycrystalline Silicon Thin Film Transistors",

abstract = "We studied the impact of grain boundary (GB) protrusion on the electrical properties of low temperature polycrystalline silicon thin film transistors. The analysis of atomic force microscopy and transmission electron microscopy images indicate the grain size of 350 nm and a protrusion height of 35 nm. The transfer and output characteristics are well fitted by technology computer-aided design using two different density of states for poly-Si grain and GB, respectively. From 2-D contour mapping, a drastic reduction of hole concentration ( sim 5times 10^16,mathrmcm^-3 ) at GB protrusion site was obtained as compared to the grain ( sim 3times 10^18,mathrmcm^-3 ). Trapping concentration at GB is much higher, which leads to the reduction in the mobility.",

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author = "Billah, {Mohammad Masum} and Siddik, {Abu Bakar} and {Bae Kim}, Jung and Lai Zhao and Choi, {Soo Young} and Yim, {Dong Kil} and Jin Jang",

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AU - Billah, Mohammad Masum

AU - Siddik, Abu Bakar

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AU - Zhao, Lai

AU - Choi, Soo Young

AU - Yim, Dong Kil

AU - Jang, Jin

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Effect of Grain Boundary Protrusion on Electrical Performance of Low Temperature Polycrystalline Silicon Thin Film Transistors

Abstract

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