Abstract
We have identified the mechanism of capacitance-voltage (C-V) hysteresis behavior often observed in pentacene organic thin-film transistors (OTFTs). The C-V characteristics were measured for pentacene OTFTs fabricated on glass substrates with MoW as gate/source/drain electrode and tetraethoxysilane (TEOS) SiO2 as gate insulator. The measurements were made at room temperature and elevated temperatures. From the room temperature measurements, we found that the hysteresis behavior was caused by hole injection into the gate insulator from the pentacene semiconductor for large negative gate voltages, resulting in the negative flat-band voltage shift. However electron injection was observed only at elevated temperatures.
Original language | English |
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Pages (from-to) | L1414-L1416 |
Journal | Japanese Journal of Applied Physics |
Volume | 44 |
Issue number | 46-49 |
DOIs | |
Publication status | Published - 25 Nov 2005 |
Keywords
- C-V hysteresis behavior
- Organic TFT