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High Performance Dual Gate Blue Laser Annealed Poly-Si Thin-Film Transistor for High-Resolution Displays

  • Duk Young Jeong
  • , Mohammad Masum Billah
  • , Abu Bakar Siddik
  • , Byungju Han
  • , Yeoungjin Chang
  • , Jin Jang

Research output: Contribution to journalArticlepeer-review

9 Citations (Scopus)

Abstract

We report a dual gate (DG), low-temperature polysilicon (LTPS) thin-film transistor (TFT) using blue laser annealing (BLA) of amorphous silicon. The DG TFTs with variable bottom gate lengths (LBG) from 2 to 8 μ m and a fixed top gate length (LTG) of 6 μm are investigated. The drain currents of the DG LTPS TFT with LBG > LTG by 2 μ m under DG sweep (DS) are 4.3 times those of the single gate TFT. The high carrier concentrations (1019 cm-3) at both interfaces (top gate insulator (GI)/poly-Si and poly-Si/bottom GI) under DS is confirmed by technology computer-aided design (TCAD) simulation, which might lead to high drain currents. The poly-Si layer exhibits no grain boundary protrusion from the transmission electron microscopy (TEM) cross-sectional micrograph and thus induces a strong bulk accumulation effect under DS. The fabricated DG TFT-based ring oscillator (RO) and shift register (SR) exhibit an excellent oscillation frequency of 15.8 MHz, fast-rising and falling time of 370 and 366 ns at a driving voltage of-10 V, respectively.

Original languageEnglish
Article number9474904
Pages (from-to)3863-3869
Number of pages7
JournalIEEE Transactions on Electron Devices
Volume68
Issue number8
DOIs
Publication statusPublished - Aug 2021

Bibliographical note

Publisher Copyright:
© 1963-2012 IEEE.

Keywords

  • Blue laser annealing (BLA)
  • coplanar thin-film transistor (TFT)
  • low temperature polysilicon (LTPS)
  • technology computer-aided design (TCAD)

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