Abstract
In this paper, we have identified the mechanism of C-V hysteresis behavior often observed in pentacene organic thin-film transistors (OTFTs). The capacitance-voltage (C-V) characteristics were measured for pentacene OTFTs fabricated on glass substrates with MoW as gate/source/drain electrode and TEOS SiO2 as gate insulator. The measurements were made at room temperature and elevated temperatures. From the room temperature measurements, we found that the hysteresis behavior was caused by hole injection into the gate insulator from the pentacene semiconductor for large negative gate voltages, resulting in the negative flat-band voltage shift. However electron injection was observed only at elevated temperatures.
Original language | English |
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Pages (from-to) | 1364-1369 |
Number of pages | 6 |
Journal | Proceedings of International Meeting on Information Display |
Volume | 2 |
Publication status | Published - 2006 |
Event | 5th International Meeting on Information Display - Seoul, Korea, Republic of Duration: 19 Jul 2005 → 23 Jul 2005 |