Low-voltage-operated top-gate polymer thin-film transistors with high capacitance poly(vinylidene fluoride-trifluoroethylene)/poly(methyl methacrylate) dielectrics

Soon Won Jung; Kang Jun Baeg; Sung Min Yoon; In Kyu You; Jong Keun Lee; Young Soon Kim; Yong Young Noh

doi:10.1063/1.3511697

Low-voltage-operated top-gate polymer thin-film transistors with high capacitance poly(vinylidene fluoride-trifluoroethylene)/poly(methyl methacrylate) dielectrics

Soon Won Jung
, Kang Jun Baeg
, Sung Min Yoon
, In Kyu You
, Jong Keun Lee
, Young Soon Kim
, Yong Young Noh

Research output: Contribution to journal › Article › peer-review

45 Citations (Scopus)

Abstract

We report on low-voltage-operated polymer transistors with poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/poly(methyl methacrylate) (PMMA) blended films as a gate dielectric layer. Top-gate polymer transistors are fabricated by all-solution processes on poly(9,9-dioctylfuorene-co-bithiophene) (F8T2) as an active layer. Both the operating voltage and charge carrier mobility are improved using P(VDF-TrFE)/PMMA blended films as a dielectric layer and by optimization of the ratio of the composite. F8T2 transistors have a high field-effect mobility of 1× 10^-2 cm² /V s and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE)]/(PMMA) blended film (10.4-8.4). The hysteresis induced by the ferroelectric polymer effectively disappears with the addition of a small amount of amorphous PMMA (5 wt %).

Original language	English
Article number	102810
Journal	Journal of Applied Physics
Volume	108
Issue number	10
DOIs	https://doi.org/10.1063/1.3511697
Publication status	Published - 15 Nov 2010

Bibliographical note

Funding Information:
This research was supported by the Development of Next Generation RFID Technology for item-level applications (Grant No. 2008-F052-01) by the Ministry of Knowledge Economy (MKE), the Regional Innovation Center for Industrialization of Advanced Chemical Materials (Grant No. TIC04-05-42, Hanbat National Univ.) by MKE, and Development of New Materials and Solution Process for LCD Backplanes by MKE (ISTK). Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2010-0023180).

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title = "Low-voltage-operated top-gate polymer thin-film transistors with high capacitance poly(vinylidene fluoride-trifluoroethylene)/poly(methyl methacrylate) dielectrics",

abstract = "We report on low-voltage-operated polymer transistors with poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/poly(methyl methacrylate) (PMMA) blended films as a gate dielectric layer. Top-gate polymer transistors are fabricated by all-solution processes on poly(9,9-dioctylfuorene-co-bithiophene) (F8T2) as an active layer. Both the operating voltage and charge carrier mobility are improved using P(VDF-TrFE)/PMMA blended films as a dielectric layer and by optimization of the ratio of the composite. F8T2 transistors have a high field-effect mobility of 1× 10-2 cm2 /V s and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE)]/(PMMA) blended film (10.4-8.4). The hysteresis induced by the ferroelectric polymer effectively disappears with the addition of a small amount of amorphous PMMA (5 wt \%).",

author = "Jung, \{Soon Won\} and Baeg, \{Kang Jun\} and Yoon, \{Sung Min\} and You, \{In Kyu\} and Lee, \{Jong Keun\} and Kim, \{Young Soon\} and Noh, \{Yong Young\}",

note = "Funding Information: This research was supported by the Development of Next Generation RFID Technology for item-level applications (Grant No. 2008-F052-01) by the Ministry of Knowledge Economy (MKE), the Regional Innovation Center for Industrialization of Advanced Chemical Materials (Grant No. TIC04-05-42, Hanbat National Univ.) by MKE, and Development of New Materials and Solution Process for LCD Backplanes by MKE (ISTK). Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2010-0023180).",

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doi = "10.1063/1.3511697",

language = "English",

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AU - Jung, Soon Won

AU - Baeg, Kang Jun

AU - Yoon, Sung Min

AU - You, In Kyu

AU - Lee, Jong Keun

AU - Kim, Young Soon

AU - Noh, Yong Young

N1 - Funding Information: This research was supported by the Development of Next Generation RFID Technology for item-level applications (Grant No. 2008-F052-01) by the Ministry of Knowledge Economy (MKE), the Regional Innovation Center for Industrialization of Advanced Chemical Materials (Grant No. TIC04-05-42, Hanbat National Univ.) by MKE, and Development of New Materials and Solution Process for LCD Backplanes by MKE (ISTK). Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Education, Science and Technology (2010-0023180).

PY - 2010/11/15

Y1 - 2010/11/15

N2 - We report on low-voltage-operated polymer transistors with poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/poly(methyl methacrylate) (PMMA) blended films as a gate dielectric layer. Top-gate polymer transistors are fabricated by all-solution processes on poly(9,9-dioctylfuorene-co-bithiophene) (F8T2) as an active layer. Both the operating voltage and charge carrier mobility are improved using P(VDF-TrFE)/PMMA blended films as a dielectric layer and by optimization of the ratio of the composite. F8T2 transistors have a high field-effect mobility of 1× 10-2 cm2 /V s and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE)]/(PMMA) blended film (10.4-8.4). The hysteresis induced by the ferroelectric polymer effectively disappears with the addition of a small amount of amorphous PMMA (5 wt %).

AB - We report on low-voltage-operated polymer transistors with poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)]/poly(methyl methacrylate) (PMMA) blended films as a gate dielectric layer. Top-gate polymer transistors are fabricated by all-solution processes on poly(9,9-dioctylfuorene-co-bithiophene) (F8T2) as an active layer. Both the operating voltage and charge carrier mobility are improved using P(VDF-TrFE)/PMMA blended films as a dielectric layer and by optimization of the ratio of the composite. F8T2 transistors have a high field-effect mobility of 1× 10-2 cm2 /V s and a low operation gate voltage of less than 10 V. The operation voltage effectively decreases owing to the high permittivity of the P(VDF-TrFE)]/(PMMA) blended film (10.4-8.4). The hysteresis induced by the ferroelectric polymer effectively disappears with the addition of a small amount of amorphous PMMA (5 wt %).

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Low-voltage-operated top-gate polymer thin-film transistors with high capacitance poly(vinylidene fluoride-trifluoroethylene)/poly(methyl methacrylate) dielectrics

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