Material Design Schemes for Single-Transistor-Type Ferroelectric Memory Cells Using Pt/(Bi,La)₄Ti₃O₁₂/ONO/Si Structures

We successfully fabricated metal-ferroelectric-insulalor-semiconductor (MFIS) structures using Bi_3.465La_0.85Ti₃O ₁₂ (BLT) ferroelectric thin films and SiO₂/Si ₃N₄/SiO₂ (ONO) stacked buffer layers for single-transistor-type ferroelectric nonvolatile memory applications. The BLT films were deposited on the prepared Pt/Ti/SiO₂/Si and ONO/Si substrates by a sol-gel spin-coating method. The dielectric constant and the leakage current density of the prepared ONO film were measured to be 5.6 and 1. 0 × 10^-9 A/cm² at 3 MV/cm, respectively. We found that the material and electrical properties of the BLT films were effectively modulated by the crystallographic orientation control of the thin films, which were strongly affected by the first annealing process at relatively low temperature. While the fabricated MFIS capacitors using (117)-oriented BLT films showed a charge injection phenomenon in C-V properties at high operating voltage, c-axis-oriented BLT-loaded MFIS capacitors showed a memory window of 0.6 V even at a voltage sweep of ±8 V. We conclude from these results that the c-axis-oriented BLT films formed by the newly proposed fabrication method can be successfully applied to single-transistor-type ferroelectric memory cells.