TY - JOUR
T1 - Threshold voltage shift-proof circular oxide thin film transistor with top and bottom gates for high bending stability
AU - Mativenga, Mallory
AU - Lim, Seoungbum
AU - Haque, Farjana
AU - Ryu, Jehwang
N1 - Publisher Copyright:
© 2020 The Japan Society of Applied Physics.
PY - 2020/10/1
Y1 - 2020/10/1
N2 - Negligible threshold-voltage shift is reported for oxide thin-film transistors (TFTs) under high current (3 μA) and tensile bending stress (2 mm radius). The good stability is attributed to a circular TFT structure with electrically shorted top and bottom gates, and a polyimide substrate embedded with carbon-nanotubes for mechanical support and damage-free detachment from carrier glass. The circular structure leads to uniform electric field distribution across the channel, hard saturation in output characteristics, independence from tensile bending direction-related degradation, as well as isolation of the channel from stress concentrated points, which arise from local electric-field crowding at sharp corners or channel edges. The double-gate topology increases gate-drivability and achieves volume-Accumulation, which minimizes the influence of defects at the channel surface and slight variations in carrier concentration during stress. Furthermore, the presence of two gates slightly shifts the location of the neutral bending plane towards the oxide semiconductor, thereby significantly reducing strain.
AB - Negligible threshold-voltage shift is reported for oxide thin-film transistors (TFTs) under high current (3 μA) and tensile bending stress (2 mm radius). The good stability is attributed to a circular TFT structure with electrically shorted top and bottom gates, and a polyimide substrate embedded with carbon-nanotubes for mechanical support and damage-free detachment from carrier glass. The circular structure leads to uniform electric field distribution across the channel, hard saturation in output characteristics, independence from tensile bending direction-related degradation, as well as isolation of the channel from stress concentrated points, which arise from local electric-field crowding at sharp corners or channel edges. The double-gate topology increases gate-drivability and achieves volume-Accumulation, which minimizes the influence of defects at the channel surface and slight variations in carrier concentration during stress. Furthermore, the presence of two gates slightly shifts the location of the neutral bending plane towards the oxide semiconductor, thereby significantly reducing strain.
UR - http://www.scopus.com/inward/record.url?scp=85091993767&partnerID=8YFLogxK
U2 - 10.35848/1347-4065/abb250
DO - 10.35848/1347-4065/abb250
M3 - Article
AN - SCOPUS:85091993767
SN - 0021-4922
VL - 59
JO - Japanese Journal of Applied Physics
JF - Japanese Journal of Applied Physics
IS - 10
M1 - 104001
ER -