Abstract
This paper introduces vertical interconnect technology in silicon, package, and printed circuit board (PCB) levels with a coaxial structure, respectively. The coaxial structure has been known to be advantageous in terms of signal integrity (SI) compared to the non-coaxial structure. The coaxial structure is easy to control the characteristic impedance Z0 and robust to crosstalk. The silicon-level interconnect includes the wire bonding (WB) and through-silicon via (TSV) technology, the package-level interconnect includes an elastomer package test socket. The PCB-level interconnect includes the vias, and vertical conductive structure (VeCS). For each level, the non-coaxial and coaxial interconnects are compared with the measurement results in the frequency domain. In conclusion, this paper successfully shows the improvement of the coaxial structure at silicon, package, and PCB levels.
| Original language | English |
|---|---|
| Title of host publication | 2024 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMC+SIPI 2024 |
| Publisher | Institute of Electrical and Electronics Engineers Inc. |
| Pages | 39-44 |
| Number of pages | 6 |
| ISBN (Electronic) | 9798350360394 |
| DOIs | |
| Publication status | Published - 2024 |
| Event | 2024 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMC+SIPI 2024 - Phoenix, United States Duration: 5 Aug 2024 → 9 Aug 2024 |
Publication series
| Name | IEEE International Symposium on Electromagnetic Compatibility |
|---|---|
| ISSN (Print) | 1077-4076 |
| ISSN (Electronic) | 2158-1118 |
Conference
| Conference | 2024 IEEE International Symposium on Electromagnetic Compatibility, Signal and Power Integrity, EMC+SIPI 2024 |
|---|---|
| Country/Territory | United States |
| City | Phoenix |
| Period | 5/08/24 → 9/08/24 |
Bibliographical note
Publisher Copyright:© 2024 IEEE.
Keywords
- 3D integrated circuit
- coaxial structure
- package
- PCB
- signal integrity
- TSV
- vertical interconnect
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